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? semiconductor components industries, llc, 2000 april, 2000 rev. 2 1 publication order number: MC44604/d

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the MC44604 is an enhanced high performance controller that is specifically designed for offline and dctodc converter applications. its high current totem pole output is ideally suited for driving a power mosfet. the MC44604 is an evolution of the mc44603a. like the mc44603a, the MC44604 has been optimized to operate with universal ac mains voltage from 80 v to 280 v. it also offers enhanced safety and reliable power management thanks to its protection features (foldback, overvoltage detection, softstart, accurate demagnetization detection). in addition, the MC44604 offers a new efficient way to reduce the standby operating power by means of a socalled pulsed mode standby operation of the converter, significantly reducing the converter consumption in standby mode. current mode controller ? operation up to 250 khz output switching frequency ? inherent feed forward compensation ? latching pwm for cyclebycycle current limiting ? oscillator with precise frequency control high flexibility ? externally programmable reference current ? secondary or primary sensing ? high current totem pole output ? undervoltage lockout with hysteresis safety/protection features ? overvoltage protection facility against open loop ? protection against short circuit on oscillator pin ? fully programmable foldback ? softstart feature ? accurate maximum duty cycle setting ? demagnetization (zero current detection) protection ? internally trimmed reference greenline ? controller ? ? low startup and operating current ? pulsed mode standby for low standby losses ? low dv/dt for low emi this document contains information on a new product. specifications and information herein are subject to change without notice. device package shipping ordering information MC44604p pdip16 25 units/rail http://onsemi.com pdip16 p suffix case 648 1 16 marking diagram a = assembly location wl, l = wafer lot yy, y = year ww, w = work week pin connections 116 13 12 11 10 9 2 3 4 5 6 7 8 (top view) v cc v c output overvoltage protection current sense input demagnetization detection input r ref standby current set gnd foldback input c t softstart/d max / voltage mode clamp error amp input error amp output 15 14 error amp input standby management 1 16 MC44604p awllyyww
MC44604 http://onsemi.com 2 block diagram + pwm q reset set latch supply error 3 2 1 4 initialization reference block 16 buffer 8 12 oscillator 10 15 14 13 6 11 5 amp standby (lpk)max programmation current sense dmax & softstart control 7 8 v c output gnd overvoltage protection (ovp) demagnetization detection standby management thermal shutdown clamp error ampllifier input c t standby management voltage feedback input e/a output foldback input standby current current sense softstart MC44604 v stby v cc enable uvlo1 uvlo2 v ref v cc r ref v demag out uvlo1 uvlo2 v stby 18 v v stby i ref i ref i ref v stby v ref v ref i ref v cc enable 4.7 v v ref v dis(stbylatched) v stby set input (css)/dmax voltage mode control v cc enable v cc dis(stbylatched) dis(stby) dis(stby) osc prot v osc block v cs foldback demagnetization management overvoltage management
MC44604 http://onsemi.com 3 maximum ratings rating pin # symbol value unit total power supply and zener current (i cc + i z ) 30 ma output supply voltage with respect to ground 2 1 v c v cc 18 v output current* 3 ma source i o(source) 750 sink i o(sink) 750 output energy (capacitive load per cycle) w 5.0 m j softstart 11 v ss 0.3 to 2.2 v clamp error amp input 12 v clea 0.3 to 4.5 v foldback input, standby management 0.3 to v cc + 0.3 v overvoltage protection, current sense input, r ref , error amp input, error amp output, c t , standby current set v in 0.3 to 5.5 v demagnetization detection input current 8 ma source i demagib (source) 4.0 sink i demagib (sink) 10 error amplifier output sink current 13 i e/a (sink) 20 ma power dissipation and thermal characteristics maximum power dissipation at t a = 85 c p d 0.6 w thermal resistance, junctiontoair r q ja 100 c/w operating junction temperature t j 150 c operating ambient temperature t a 25 to +85 c *maximum package power dissipation must be observed. electrical characteristics (v cc and v c = 12 v [note 1.], r ref = 10 k w , c t = 820 pf, for typical values t a = 25 c, for min/max values t a = 25 to +85 c [note 2.], unless otherwise noted.) characteristic pin # symbol min typ max unit output section (note 3.) output voltage* 3 v low level drop voltage (i sink = 100 ma) (i sink = 500 ma) v ol 1.0 1.4 1.2 2.0 high level drop voltage (i source = 200 ma) (i source = 500 ma) v oh 1.5 2.0 2.0 2.7 output voltage during initialization phase 3 v ol v gg v cc = 0 to 1.0 v, i sink = 10 m a v 1 0 t 5 0 v i 100 a ol 01 1.0 10 v cc = 1.0 to 5.0 v , i sink = 100 m a v cc =50to13v i sink =10ma 0.1 01 1.0 10 v cc = 5 . 0 to 13 v , i si n k = 1 . 0 ma 0 . 1 1 . 0 output voltage rising edge slewrate (c l = 1.0 nf, t j = 25 c) 3 dvo/dt 300 v/ m s output voltage falling edge slewrate (c l = 1.0 nf, t j = 25 c) 3 dvo/dt 300 v/ m s error amplifier section voltage feedback input (v e/a out = 2.5 v) 14 v fb 2.4 2.5 2.6 v input bias current (v fb = 2.5 v) 14 i fbib 2.0 0.6 m a open loop voltage gain (v e/a out = 2.0 v to 4.0 v) a vol 65 70 db unity gain bandwidth bw mhz t j = 25 c t a = 25 to +85 c 5.5 voltage feedback input line regulation (v cc = 10 v to 15 v) 14 v fblinereg 10 10 mv *v c must be greater than 5.0 v. 1. adjust v cc above the startup threshold before setting to 12 v. 2. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 3. no output signal when the error amplifier is in low state, i.e., v fb = 2.7 v.
MC44604 http://onsemi.com 4 electrical characteristics (v cc and v c = 12 v [note 1.], r ref = 10 k w , c t = 820 pf, for typical values t a = 25 c, for min/max values t a = 25 to +85 c [note 2.], unless otherwise noted.) characteristic pin # symbol min typ max unit error amplifier section (continued) output current 13 ma sink (v e/a out = 1.5 v, v fb = 2.7 v) t a = 25 to +85 c i sink 2.0 12 source (v e/a out = 5.0 v, v fb = 2.3 v) t a = 25 to +85 c i source 2.0 0.2 output voltage swing 13 v high state (i e/a out (source) = 0.5 ma, v fb = 2.3 v) v oh 5.5 6.5 7.5 low state (i e/a out (sink) = 0.33 ma, v fb = 2.7 v) v ol 1.0 1.1 reference section reference output voltage (v cc = 10 v to 15 v) 16 v ref 2.4 2.5 2.6 v reference current range (i ref = v ref /r ref , r = 5.0 k to 25 k w ) 16 i ref 500 100 m a reference voltage over i ref range d v ref 40 40 mv oscillator section frequency f osc khz t a = 0 to +70 c 40.5 46 48.5 t a = 25 to +85 c 40 49 frequency change with voltage (v cc = 10 v to 15 v) d f osc / d v 0.05 %/v frequency change with temperature (t a = 25 to +85 c) d f osc / d t 0.05 %/ c oscillator voltage swing (peaktopeak) 10 v osc(pp) 2.0 v ratio charge current/reference current (t a = 25 to +85 c) i charge /i ref 0.35 0.43 fixed maximum duty cycle = i discharge /(i discharge + i charge ) d 78 80 82 % undervoltage lockout section startup threshold 1 v stupth 13.6 14.5 15.4 v disable voltage after threshold turnon 1 v disable1 v t a = 0 to +70 c 8.6 9.0 9.4 t a = 25 to +85 c 8.3 9.6 disable voltage after threshold turnon 1 v disable2 7.0 7.5 8.0 v delta v cc during standby (v stupth v disable2 ) (t a = 25 c to 85 c) 1 v stupth v disable2 1.8 2.0 2.2 v demagnetization detection section demagnetization detect input 8 demagnetization comparator threshold (v pin8 decreasing) v demagth 50 65 80 mv propagation delay (input to output, low to high) 0.25 m s input bias current (v demag = 65 mv) i demaglb 0.5 m a negative clamp level (i demag = 2.0 ma) c l(neg) 0.38 v positive clamp level (i demag = +2.0 ma) c l(pos) 0.72 v softstart section ratio charge current/i ref i ss(ch) /i ref t a = 0 to +70 c 0.37 0.4 0.43 t a = 25 to +85 c 0.36 0.44 discharge current (v softstart = 1.0 v) 11 i discharge 1.5 5.0 ma clamp level v ss(cl) 2.2 2.4 2.6 v duty cycle (r softstart = 12 k w ) duty cycle (v softstart (pin11) = 0.1 v) d softstart 12k d softstart 36 42 49 0 % 1. adjust v cc above the startup threshold before setting to 12 v. 2. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
MC44604 http://onsemi.com 5 electrical characteristics (v cc and v c = 12 v [note 1.], r ref = 10 k w , c t = 820 pf, for typical values t a = 25 c, for min/max values t a = 25 to +85 c [note 2.], unless otherwise noted.) characteristic pin # symbol min typ max unit current sense section maximum current sense input threshold (v feedback (pin14) = 2.3 v and v foldback (pin6) = 1.2 v) 7 v csth 0.93 0.96 1.00 v input bias current 7 i csib 10 2.0 m a propagation delay* in normal mode in standby mode t csnm t csstby 120 120 200 200 ns *current sense input to output at v th of mos transistor = 3.0 v. overvoltage section protection threshold level on v ovp 6 v ovpth 2.42 2.5 2.58 v propagation delay (v ovp > 2.58 v to v out low) 1.0 3.0 m s protection level on v cc v cc prot v t a = 0 to +70 c 16.1 17 17.9 t a = 25 to +85 c 15.9 18.1 input resistance k w t a = 0 to +70 c 1.5 2.0 3.0 t a = 25 to +85 c 1.4 3.4 foldback section (note 3.) current sense voltage threshold (v foldback (pin5) = 0.9 v) 5 v csth 0.84 0.88 0.89 v foldback input bias current (v foldback (pin5) = 0 v) 5 i foldbacklb 6.0 2.0 m a clamp error amplifier input clamp level (@ l = 30 ma) 12 vcl 4.5 4.7 4.9 v standby pulsed mode section standby initialization current ratio (s1 closed) 15 i init /i ref 126 140 154 minimum initialization current pulse width* t init 1.0 m s standby on detection current ratio 15 i det /i ref 0.34 0.38 0.42 standby regulation current ratio 15 i reg /i ref 18 20.5 23 standby bias current (s1 and s2 open; 0 v v pin15 v stupth )** 15 i stbyib 1.0 2.0 m a * this is the minimum time during which the pin 15 current must be higher than i init to enable the detection of the transition normal to standby mode. **tested using v cc = 6.0 v, 9.0 v, 13.5 v, the MC44604 being off. standby current set peak standby current setting ratio 9 t a = 0 to +70 c i pkstby /i ref 0.37 0.4 0.43 t a = 25 to +85 c 0.36 0.4 0.44 standby current sense threshold ratio* 7 v pin9 /v csst 2.4 2.6 2.9 *tested using v pin9 = 0.2 v, 0.4 v, 0.6 v, 0.8 v, 1.0 v. total device power supply current i cc ma startup* 0.3 0.45 operating t a = 25 to +85 c (note 2.) 16 20 24 power supply zener voltage (i cc = 25 ma) v z 18.5 v thermal shutdown 155 c *tested using v cc = 6.0 v, 9.0 v, 13.5 v, the MC44604 being off. 1. adjust v cc above the startup threshold before setting to 12 v. 2. low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. 3. this function can be inhibited by connecting pin 5 to v cc .
MC44604 http://onsemi.com 6 120 115 110 105 100 95 90 85 80 50 25 0 25 50 75 100 3.0 120 115 110 105 100 95 90 85 80 50 25 0 25 50 75 100 3.2 2.5 2.0 1.5 1.0 3.1 3.0 2.9 2.8 50 25 0 25 50 75 100 50 25 0 25 50 75 100 50 25 0 25 50 75 100 50 25 0 25 50 75 100 2.20 80 2.15 2.10 2.05 2.00 1.95 1.90 1.85 1.80 75 70 65 60 55 50 propagation delay ( ) t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) s propagation delay ( ) s propagation delay ( ) s v demagth , demag comparator threshold (mv) v stupth , delta v cc during standby (v) a vcs, current sense gain figure 1. propagation delay current sense input vs. temperature figure 2. propagation delay current sense input in standby vs. temperature figure 3. current sense gain vs. temperature figure 4. propagation delay current (v ovp > 2.58 v to v out low) vs. temperature figure 5. delta v cc during standby figure 6. demag comparator threshold vs. temperature v disable2
MC44604 http://onsemi.com 7 70 60 50 40 30 20 10 0 10 20 1 10 100 1000 10000 0.890 0.885 0.880 0.875 0.870 0.865 0.860 0.855 0.850 0.845 0.840 50 25 0 25 50 75 10 0 49000 48000 47000 46000 45000 44000 43000 42000 41000 40000 50 25 0 25 50 75 100 50 25 0 25 50 75 100 0.42 2.9 0.41 0.40 0.39 0.38 0.37 0.36 0.35 0.34 156 50 25 0 25 50 75 100 151 146 141 136 131 126 2.8 2.7 2.6 2.5 2.4 0 0.5 1 1.5 2 2.5 t a , ambient temperature ( c) v pin9 , standby current set (v) t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) f, frequency (khz) i /i f , osc oscillator frequency (hz) gain (db) 160 60 40 v csth, current sense threshold (v), vph 9 = q9v v standby current ph 9/ v csst, sense threshold ratio figure 7. error amplifier gain and phase vs. frequency figure 8. current sense voltage threshold vs. temperature figure 9. oscillator frequency vs. temperature figure 10. standby on detection current ratio vs. temperature figure 11. standby initialization current ratio vs. temperature figure 12. standby current sense threshold ratio v pin5 = 0.9 v det ref (standby on detection current ratio) i /i init ref (standby initialization current ratio)
MC44604 http://onsemi.com 8 0.44 0.43 0.42 0.41 0.40 0.39 0.38 0.37 0.36 1.2 1.0 0.8 0.6 0.4 0.2 0 0 100 200 300 400 500 1.8 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 02468101214 24 20 16 12 8 4 0 024 6810121416 0 100 200 300 400 500 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 23.0 22.5 22.0 21.5 21.0 20.5 20.0 19.5 19.0 18.5 18.0 50 25 0 25 50 75 100 50 25 0 25 50 75 100 0 start up current (ma) v ol , sink output t a , ambient temperature ( c) t a , ambient temperature ( c) i sink , sink output current (ma) i source , output source current (ma) v cc , supply voltage (v) v cc , supply voltage (v) i cc , supply current (ma) v oh , source output saturation voltage (v) saturation voltage (v) i pkstby , peak stanby , standby regulation current setting ratio current ratio figure 13. peak standby current setting ratio vs. temperature figure 14. standby regulation current ratio vs. temperature figure 15. sink output saturation voltage vs. sink current figure 16. source output saturation voltage vs. source current figure 17. startup current vs. v cc figure 18. supply current vs. supply voltage /i ref i reg /i ref
MC44604 http://onsemi.com 9 22.0 21.5 21.0 20.5 20.0 19.5 18.0 50 25 0 25 50 75 100 y 2 , zener voltage (v) 4.90 4.85 4.80 4.75 4.70 4.65 4.60 4.55 4.50 50 25 0 25 50 75 100 t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) t a , ambient temperature ( c) 50 25 0 25 50 75 100 50 25 0 25 50 75 100 50 25 0 25 50 75 100 18.0 17.5 17.0 16.5 16.0 15.5 14.5 13.5 12.5 11.5 10.5 9.5 8.5 7.5 6.5 2.60 2.55 2.50 2.45 2.40 v stup , startup threshold voltage v disable1 , uvlo1 v disable2 , uvlo2 v ref , reference voltage (v) voltage (v) v , overvoltage threshold v , pin 12 clamp level figure 19. startup threshold, uvlo1, uvlo2 voltage vs. temperature figure 20. protection level on v cc vs. temperature figure 21. clamp error amplifier input vs. temperature figure 22. reference voltage vs. temperature figure 23. power supply zener voltage vs. temperature (v ) cc cc_prot cl
MC44604 http://onsemi.com 10 pin name pin description 1 v cc this pin is the positive supply of the ic. 2 v c the output high state, v oh , is set by the voltage applied to this pin. with a separate connection to the power source, it gives the possibility to set by means of an external resistor the output source current at a different value than the sink current. 3 output the output current capability is suited for driving a power mosfet. a bipolar transistor can also be driven for low power applications. the maximum ontime of the duty cycle can last up to 80% of the switching period. 4 gnd the ground pin is a single return typically connected back to the power source, it is used as control and power ground. 5 foldback input the foldback function ensures an overload protection. feeding the foldback input with a portion of the v cc voltage (1 v max) establishes on the system control loop a foldback characteristic allowing a smoother startup and a sharper overload protection. the foldback action performs an active current sense clamping reduction. above 1 v the foldback input is no more active. 6 overvoltage protection when the overvoltage protection pin receives a voltage greater than 17 v the device gets disabled and requires a complete restart sequence. the overvoltage level is programmable. 7 current sense input a voltage proportional to the current flowing into the power switch is connected to this input. the pwm latch uses this information to terminate the conduction of the output buffer when operating in current mode. a maximum level of 1 v allows to limit the inductor current either in current or voltage mode of operation. 8 demagnetization detection a voltage delivered by an auxiliary transformer winding provides to the demagnetization pin an indication of the magnetization state of the flyback energy reservoir. a zero voltage detection corresponds to a complete core demagnetization. the demagnetization detection ensures a discontinuous mode of operation. this function can be inhibited by connecting pin 8 to gnd. 9 standby current set using an external resistor connected to this pin, the standby burst mode peak current can be adjusted. 10 c t the normal mode oscillator frequency is programmed by the capacitor c t choice together with the r ref resistance value. c t , connected between pin 10 and gnd, generates the oscillator sawtooth. 11 softstart/d max /voltagemode a capacitor or a resistor or a voltage source connected to this pin can temporary or permanently control the effective switching dutycycle. this pin can be used as a voltage mode control input. by connecting pin 11 to ground, the MC44604 can be shut down. 12 clamp error amplifier input in normal mode, the current drawn from this pin, is used by the error amplifier to perform the regulation. a 4.7 v zener diode clamps the voltage of this pin. 13 e/a out the error amplifier output is made available for loop compensation. 14 voltage feedback this is the inverting input of the error amplifier. it uses a voltage that is built up using the current drawn from the pin 12. 15 standby management this block is designed to detect the standby mode. it particularly determines if the circuit must work in standby or in normal mode at each startup. for that, it uses an information given by an external arrangement consisting of an optocoupler. in standby mode, this block makes the circuit work in the standby configuration, and the current injected in the pin 15 is used to perform the regulation. in normal mode, this pin is internally connected to the pin 12. 16 r ref the r ref values fixes the internal reference current which is used to perform the precise oscillator waveform. the current range goes from 100 m a up to 500 m a.
MC44604 http://onsemi.com 11 operating description schematics v ref figure 24. switching off behavior ??? ??? v pin 11 17 ma i cc 0.3 ma output (pin 3) (softstart) uvlo1 v disable1 v disable2 v stupth v cc
MC44604 http://onsemi.com 12 operating description schematics ???????? ???????? >2.0 s figure 25. starting behavior and overvoltage ?? ?? ??? ??? 17 ma i cc 0.3 ma uvlo1 v ovp out output v pin 11 (softstart) v ref v disable1 v disable2 v stupth v cc prot v cc startup notake over restart normal mode loop failure
MC44604 http://onsemi.com 13 operating description schematics figure 26. softstart and d max output (pin 3) external clamp softstart internal clamp v ref v ct 3.6 v v ct low 1.6 v v osc v css + 1.6 v v demag out v demag out output (pin 3) figure 27. demagnetization v demag in demagnetization v demag in oscillator management output buffer
MC44604 http://onsemi.com 14 error amplifier a fully compensated error amplifier with access to the inverting input and output is provided. it features a typical dc voltage gain of 70 db. the noninverting input is internally biased at 2.5 v and is not pinned out. the converter output voltage is typically divided down and monitored by the inverting input. the maximum input bias current with the inverting input at 2.5 v is 2.0 m a. this can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. the error amp output (pin 13) is provided for external loop compensation. the output voltage is offset by two diodes drops ( 1.4 v) and divided by three before it connects to the inverting input of the current sense comparator. this guarantees that no drive pulses appear at the source output (pin 3) when pin 13 is at its lowest state (v ol ). this occurs when the power supply is operating and the load is removed, or at the beginning of a softstart interval. the error amp minimum feedback resistance is limited by the amplifier's minimum source current (0.2 ma) and the required output voltage (v oh ) to reach the current sense comparator's 1.0 v clamp level: r f (min) 30(10 v) 1 4 v 02 ma 22 k w + 1.0 ma 2.5 v figure 28. error amplifier compensation compensation r fb c 1 r 1 r 2 r f 13 14 voltage feedback input error amplifier 2r r 1.0 v current sense comparator gnd 4 MC44604 4.7 w + 5 foldback input pin 12 in a preferred embodiment, the feedback signal (current) is drawn from the pin 12 that is connected to the pin 15 in normal mode (note 1). using a resistor connected on pin 12, this current generates a voltage that is the input signal of the error amplifier arrangement. note 1. the error amplifier is not used in the sta ndby mode regulation. current sense comparator and pwm latch the MC44604 can operate as a current mode controller and/or as a voltage mode controller. in current mode operation, the MC44604 uses the current sense comparator, where the output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the error amplifier output (pin 13). thus the error signal controls the peak inductor current on a cyclebycycle basis. the current sense comparator pwm latch configuration used ensures that only a single pulse appears at the source output during the appropriate oscillator cycle. the inductor current is converted to a voltage by inserting the ground referenced sense resistor r s in series with the power switch q1. in normal mode, this voltage is monitored by the current sense input (pin 7) and compared to a level derived from the error amp output. the peak inductor current under normal operating conditions is controlled by the voltage at pin 13 where: i pk v (pin13) 1 4 v 3r s the current sense comparator threshold is internally clamped to 1.0 v. therefore the maximum peak switch current is: i pk(max) 1 0 v r s figure 29. output totem pole r s q uvlo v oscprot v demag out thermal protection pwm latch current sense comparator substrate current sense 14 3 7 c r s r r 3 q1 v in v c r 2 v osc (from oscillator) r oscillator the oscillator is a very accurate sawtooth generator.
MC44604 http://onsemi.com 15 the sawtooth generation in the steady state, the oscillator voltage varies between about 1.6 v and 3.6 v. indeed, the sawtooth is obtained by charging and discharging an external capacitor c t (pin 10), using two distinct current sources = i charge and i discharge . in fact, c t is permanently connected to the charging current source (0.4 i ref ) and so, the discharge current source has to be higher than the charge one to be able to decrease the c t voltage. this condition is performed, its value being (2 i ref ). two comparators are used to generate the sawtooth. they compare the c t voltage to the oscillator valley and peak values. the comparison to the low value enables to detect the end of the discharge phase while the comparison to the high value determines when the charge cycle must be stopped. a latch (l disch ) memorizes the oscillator state. figure 30. oscillator 10 c t 1 v v ref 0.4 i ref c vos prot c osc high c osc low 0 1 i regul 1.6 v q MC44604 c osc regul v osc prot v osc r s l osc 3.6 v q s r disch 01 v demag out c t < 1.6 v discharge i discharge now, in addition to the charge and discharge cycles, a third state can exist. this phase can be produced when at the end of the discharge phase, the oscillator has to wait for a demagnetization pulse before restarting. during this delay, the c t voltage must remain equal to the oscillator valley value ( 1.6 v). so, a third regulated current source i regul controlled by c osc regul , is connected to c t in order to perfectly compensate the (0.4 i ref ) current source that permanently supplies c t . ontime is only allowed during the oscillator capacitor charge. so, the maximum duty cycle is 80%. (note 1) the demagnetization condition is taken into account by a second latch (l osc ). (refer to demagnetization for further details.) oscillator frequency the oscillator frequency can be deducted using the following equations: t charge c t ? v . i charge t discharge c t ? v i discharge where: t charge is the oscillator charge time v is the oscillator peak to peak value i charge is the oscillator charge current and t discharge is the oscillator discharge time i discharge is the oscillator discharge current so, as: f osc = 1 /(t charge + t discharge ) if the regul arrangement is not activated, the following equation can be obtained: f osc 0 395 r ref ? c t demagnetization block (note 2) to enable the output, the l osc latch complementary output must be low. now, this latch reset is activated by the l disch output during the discharge phase. so, to restart, the l osc has to be set (refer to figure 30). to perform this, the demagnetization signal must be low. in a flyback, a good means to detect the demagnetization consists in using the v cc winding voltage. indeed this voltage is: e negative during the ontime, e positive during the offtime, e equal to zero for the deadtime with generally a ringing (refer to figure 31). that is why, the MC44604 demagnetization detection consists of a comparator that can compare the v cc winding voltage to a reference that is typically equal to 65 mv. note 1. the output is disabled by the signal v osc prot when v ct is lower than 1 v. (refer to figure 29 and figure 30.) note 2. the d emagnetization detection can be inhibited by connecting pin 8 to the ground.
MC44604 http://onsemi.com 16 figure 31. demagnetization detection v pin 8 0.75 v 65 mv 0.33 v ontime offtime deadtime zero current detection a diode d has been incorporated to clamp the positive applied voltages while an active clamping system limits the negative voltages to typically 0.33 v. this negative clamp level is sufficient to avoid the substrate diode switching on. in addition to the comparator, a latch system has been incorporated in order to keep the demagnetization block output level low as soon as a voltage lower than 65 mv is detected and as long as a new restart is produced (high level on the output) (refer to figure 33). this process avoids that any ringing on the signal used on the pin 8, disrupts the demagnetization detection. finally, this method results in a very accurate demagnetization detection. for a higher safety, the demagnetization block output is also directly connected to the output, disabling it during the demagnetization phase (refer to figure 29). figure 32. demagnetization block c dem oscillator output buffer r s q demag v cc negative active clamping system pin 8 d 65 mv v demag out figure 33. d max and softstart block diagram MC44604 v ref d max soft start capacitor 0.4 i ref v osc output control d z 2.4 v pin 11 output buffer oscillator maximum duty cycle and softstart control as explained in the paragraph aoscillatoro, the duty cycle cannot be more than 80%. now, using the d max and softstart control, this duty cycle can be limited to a lower value. indeed as depicted in figure 34, the pin 11 voltage is compared to the oscillator sawtooth, so that the MC44604 output should be disabled as soon as the pin 11 level becomes lower than the oscillator voltage (refer to figure 27 and to figure 25). figure 34. maximum duty cycle control voltage d max pin 11 v ct (pin 10) now, using the internal current source (0,4 i ref ), the pin 11 voltage can easily be fixed by connecting a resistor to this pin. if a capacitor is connected to pin 11 (without any resistor or in parallel to a resistor for instance), the pin 11 voltage increases from 0 to its maximum value progressively (refer to figure 26). thus, the allowed maximum duty cycle grows for a delay depending on the capacitor value (and the resistor value when a resistor is connected). so, this pin can be used to limit the duty cycle during the startup phase and thus, to perform a softstart.
MC44604 http://onsemi.com 17 figure 35. different possible uses of pin 11 pin 11 ri ri r connected to pin 11 i = 0.4 i ref v z v z c c // r t = rc in any case (particularly if no external component is connected to pin 11), an internal zener diode (d z , refer to figure 34) is able to clamp the pin 11 voltage to a value v z that is higher than the oscillator value and so, that results in no max duty cycle limitation. as soon as v disable1 is detected, a signal uvlo1 is generated until the v cc voltage falls down to v disable2 (refer to the undervoltage lockout section paragraph). during the delay between the disable 1 and the disable 2, using a transistor controlled by uvlo1, the pin 11 voltage is made equal to zero in order to make the max duty cycle and softstart arrangement ready to work for the next restart. in standby mode, this block is inhibited in order not to interfere with the standby current set. protection the MC44604 can ensure a high converter reliability thanks to the protection it offers. demagnetization detection (refer to demag ) foldback as depicted in figure 28, the foldback input (pin 5) enables to reduce the maximum v cs value that would be equal to 1 typically, if there was no foldback action. finally, the foldback arrangement is a programmable peak current limitation. figure 36. foldback characteristic v out v o nominal v cc v disable2 i pk max new startup sequence initiated i out overload it could be used as a softstart (by connecting to pin 5, a gradually increasing voltage) but in fact, it has been designed to provide the system with an effective overload protection. indeed, as the output load gradually increases, the required converter peak current becomes higher and so, v cs grows up till it reaches its maximum value (normally, v cs max = 1 v). then if the output load keeps on increasing, the system is not able to supply enough energy to maintain the output regulation. consequently, the decreasing output can be used to apply a voltage that diminishes to a value lower than 1 v, to pin 5, in order to limit the maximum peak current. in this way, the well known foldback characteristic is obtained (refer to figure 36). the foldback action can be inhibited by connecting the pin 5 to v cc . overvoltage protection the overvoltage arrangement consists of a comparator that compares the pin 6 voltage to v ref (2,5 v) (refer to figure 37). figure 37. overvoltage protection v cc v ref 0 t 2.5 v (v ref ) 2.5 v 5.0 m s v ovp out 2.0 m s (if v ovp out = 1.0, the output is disabled) in out delay t enable c ovlo delay in out t 11.6 k 2 k v ovp pin 6 if no external component is connected to pin 6, the comparator non inverting input voltage is nearly equal to: 2k w 11, 6 k w 2k w ? v cc so, the comparator output is high when: 2k w 11, 6 k w 2k w ? v cc 2, 5 v v cc 17 v a delay latch (2 m s) is incorporated in order to only take into account the overvoltages that last at least 2 m s. if this condition is achieved, v ovpout the delay latch output becomes high and as this level is brought back to the input through an or gate, v ovpout remains high (and so, the ic output is disabled) until v ref is disabled. consequently when an overvoltage longer than 2 m s is detected, the output is disabled until a new circuit restart. the v cc is connected when once the circuit has startedup in order to limit the circuit startup consumption (t is switched on when once v ref has been generated).
MC44604 http://onsemi.com 18 the overvoltage section is enabled 5 m s after the regulator has started to allow the reference v ref to stabilize. by connecting external resistors to pin 6, the threshold v cc level can be changed. figure 38. v cc management reference block: voltage and current sources generator (v ref , i ref , ...) v ref enable c startup 10 1 0 v disable 7.5 v or 12.5 v startup 14.5 v uvlo1 (to softstart) v disable1 9.0 v c uvlo1 r ref pin 16 MC44604 v cc (pin 1) undervoltage lockout section as depicted in figure 39, an undervoltage lockout has been incorporated to guarantee that the ic is fully functional before allowing operation of the system. indeed, the v cc is connected to the non inverting input of a comparator that has an upper threshold equal to 14,5 v (v stupth ) and a lower one equal to 7.5 v (v disable2 ) in normal mode and 14.5 v and 12.5 v in standby mode (typical values) (note 1). this hysteresis comparator enables or disables the reference block that generates the voltage and current sources required by the system. this block particularly, produces v ref (pin 16 voltage) and i ref that is determined by the resistor r ref connected between pin 16 and the ground: i ref v ref r ref where v ref 2.5 v (typically) in addition to this, v cc is compared to a second threshold level that is nearly equal to 9 v (v disable1 ) so that in normal mode, a signal uvlo1 is generated to reset the maximum duty cycle and softstart block and so, to disable the output stage (refer to max. duty cycle and softstart ) as soon as v cc becomes lower than v disable1 . in this way, the circuit is reset and made ready for a next startup, before the reference block is disabled (refer to figure 26). in standby, uvlo1 is not active (there is no need to discharge the softstart capacitor as the softstart pin is maintained short circuited). note 1. in sta ndby the difference between v disable2 and v stupth is decreased not to have too low pulsed mode frequencies. thus, finally in normal mode, the upper v cc limit that enables the output to be active, is 9.4 v (maximum value of v disable1 ) and so the minimum hysteresis is 4.2 v. [(v stupth ) min = 13.6 v]. the large hysteresis and the low startup current of the MC44604 make it ideally suited for offline converter applications where efficient bootstrap startup techniques are required. standby management the MC44604 has been designed to detect the transitions between the standby and normal mode and to manage each mode in an optimal way. in standby, the device monitors a pulsed mode that enables to drastically reduce the power consumption. pulsed mode the MC44604 standby is preferably associated to a flyback configuration as depicted in figure 39. figure 39. standby flyback configuration MC44604 l p v cc input voltage p v stby regulator 10 1 = standby 0 = normal mode in effect, by this means, all the output regulation levels are divided by the ratio: v hv v stby where v hv is the normal mode high voltage regulation level, v stby is the standby m p supply voltage. for instance, in the case of tv or monitors applications, the output levels (except the m p supply voltage, v stby ) are drastically reduced by a ratio in the range of 10. consequently, as the output voltages are reduced, the losses due to the output leakage consumption, are practically eliminated, without having to disconnect the loads. startup operations the choice of the right configuration (normal or standby) is performed at each startup.
MC44604 http://onsemi.com 19 that is why, as explained in the transitions , at each change of mode, the MC44604 is first turned off so that a new startup should be performed. figure 40. startup operation standby i pin 15 > i det * yes no startup v cc gets higher than v stupth pin 15 and pin 12 are kept disconnected and so, the e/a input receives no feed- back (the regulation is per- formed by comparing i pin 15 to i reg refer to standby regulation ) the softstart is inhibited and its capacitor is dis- charged the lpmax limitation block is activated (clamp of the peak current) the level v disable2 is increased (refer to under- voltage lockout section) the pin 15 is con- nected to pin 12 to pro- vide the e/a input with a feedback the standby block is inhibited normal mode * this test is performed during the first 5 s of circuit operation at each startup, the circuit detects if it must work in standby or in normal mode configuration. to do that, the circuit compares the current i pin15 to i det so that, if: ei pin15 > i det : standby mode ei pin15 < i det : normal mode according to the detected mode, the circuit configuration is set (refer to figure 40). this detection phase takes place during the first 5 m s of circuit operation in order to have the internal signals well stabilized before the decision is taken. figure 41. standby pin 15 arrangement c v stby pin 15 opto coupler tl431 r v cc MC44604 z r reg r det r init t p standby management the standby operation consists of two main phases: e the off phase during which the MC44604 is off. during this sequence, the circuit v cc is being charged and no energy is transferred to the output. e the active phase during which the MC44604 is on. at this moment, some power can be drawn from the mains. during the active phase, the power conversion is controlled so that: e the normal mode regulation means (error amplifier) and the softstart are inhibited e the v cc undervoltage lockout (v disable2 ) level is increased from 9 v up to 12.5 v. this limitation of the v cc hysteresis enables to increase the pulsed mode frequency e the peak inductor current is forced to be constant and equal to the level programmable by the external resistor r ipmax connected to the pin 9 so that: i pmax 0, 4 i ref r lpmax 2, 6 r s where: i pmax is the standby inductor peak current, r s is the current sense resistor. e when the pin 15 current gets higher than the threshold i reg (20.5 i ref ), this operating mode stops and the circuit output is latched off. so, in fact, the active phase is split into two distinct sequences and finally three phases can be defined (refer to figure 32): e the off phase : the MC44604 is off and the v cc capacitor is being charged. when the v cc gets higher than v stupth , the circuit turns on and the switching sequence starts e the switching phase : the circuit is on and forces a constant peak inductor current. this sequence lasts until i pin15 gets higher than i reg e the latched phase : the circuit is on but the output is disabled. this sequence lasts until the standby v cc undervoltage lockout voltage (12.5 v) is reached. a new off phase is then initialized.
MC44604 http://onsemi.com 20 ???? ???? time v i zener i pin 15 output v pin 15 cc v stby p supply voltage i reg i det the output is latched off until the next restart stby v disable 2 (12.5 v) figure 42. standby regulation v stup (14.5 v) as a consequence, v stby varies between a peak value (obtained at the end of the switching phase) and a valley level (reached at the end of the off phase). the level of the peak value is controlled by forcing a current higher than i reg in pin 15 when this level has reached the desired value. the arrangement in figure 41 allows to obtain this operation. a zener diode z is connected so that a current limited by r reg , is drawn by this device, when the m p supply voltage gets higher than v z . by this way, the current injected in the pin 15 increases and when this current is detected as higher than i reg , the output gets disabled until the next startup (note 1). practically, the pin 15 current can be expressed as follows (when the zener is activated): i pin15 ctr v stby v opto v z r reg where: ctr is the opto coupler gain, v opto is opto coupler voltage drop. so, as the vstby peak value is obtained when (i pin15 = i reg ), it can be calculated using the following equation: v stby pk v z v opto r reg i reg ctr practically, r reg is chosen very low (in the range of 10 w , low resistance just to limit the current when v stby pk gets higher than v z ): v stby pk v z v opto note 1. if the pin 15 current is higher than i reg at startup, the output is just shutdown but not latched. the circuit must detect a sequence during which i pin15 lower than i reg before being able to latch gets higher than v z ). transitions between normal mode and standby mode (refer to figure 43) the MC44604 detects a transition by comparing the pin 15 current to: ei det (transition standby to normal mode) ei init (transition normal mode to standby) each transition detection results in the circuit turning off, so that the device can work in the new mode after the following restart. ? transition normal mode to standby: this transition is detected by comparing the i pin15 current to the threshold current (i init ). i init is high enough so that the opto coupler current used for the regulation, never exceeds this value. the arrangement in figure 41 is well adapted to this mode of operation. the m p initializes the standby mode by turning on the switch t. this results in the c capacitor charge that produces a peak current in the primary side of the opto coupler. c and r init must be dimensioned so that the opto coupler primary side generates a pin 15 current higher than i init during more than 1 m s. ? transition standby to normal mode: if the circuit detects that (i pin15 < i det ) during standby operation, the circuit is turned off. so, if the normal mode is maintained at the following startup, the circuit will restart in a normal mode configuration. the arrangement in figure 41 allows to perform this detection. when the m p detects the end of the standby, it turns off the switch t and the opto coupler stops supplying current to the circuit. figure 43. transitions between modes standby burst mode normal mode 14.5 v 12.5 v the transition standby to normal mode occurs while the circuit is on (working phase) the transition standby to normal mode occurs while the circuit is off (v cc charge phase) standby burst mode normal mode standby time ( ) .... ( ) .... normal mode 14.5 v 12.5 v normal mode time normal mode standby normal mode v cc v cc
MC44604 http://onsemi.com 21 application schematic rfi filter 185 vac to 270 vac d1 ... d4 1n4007 cs 1nf11kv 2.5 k w v cc 117.5 k w 4.7 k w 4.7 k w r6 150 w 9 10 11 12 13 14 15 16 MC44604p c4....c7 100 nf mtp6n60e laux rs 4.7 m w 1 nf/1000 v 1 w 15 w p lp 8 7 6 5 4 3 2 1 c1 100 f r2 68 k (2w) c2 100 f v cc c16 100 pf r4 27 k r19 10 k c9 1 nf c10 1 f r15 1 k 22 k c11 1 f r16 22 k r19 10 k c13 100 nf r11 100 r26 20 r8 15 k r9 180 k c14 4.7 nf r14 0.47 (1w) r13 1 k (5w) mr856 c18 2.2 nf mr856 220 pf mr856 100 pf 0.1 f 120/0.5 a 47 k 120 pf 1n4148 1n4937 mcr226 220 pf 220 pf 220 pf 28v/1a 100 f 0.1 f 15v/1a 1000 f 0.1 f mr856 mr852 4700 f 0.1 f mr852 4.7 k w 270 w 22 w tl431 8.2 k 47 w 100 nf bc237b bc237b 220 k w 8v/1a 1 k w bc237b moc8104 1 h 1n4148 1.2 k 1 nf 1 k 12 v 22 k (5w) 47 nf 1n4148 4.7 k
MC44604 http://onsemi.com 22 notes
MC44604 http://onsemi.com 23 notes
MC44604 http://onsemi.com 24 package dimensions pdip16 p suffix case 64808 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. a b f c s h g d j l m 16 pl seating 18 9 16 k plane t m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent r ights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information central/south america: spanish phone : 3033087143 (monfri 8:00am to 5:00pm mst) email : onlitspanish@hibbertco.com asia/pacific : ldc for on semiconductor asia support phone : 3036752121 (tuefri 9:00am to 1:00pm, hong kong time) toll free from hong kong & singapore: 00180044223781 email : onlitasia@hibbertco.com japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402745 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. MC44604/d north america literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com fax response line: 3036752167 or 8003443810 toll free usa/canada n. american technical support : 8002829855 toll free usa/canada europe: ldc for on semiconductor european support german phone : (+1) 3033087140 (mf 1:00pm to 5:00pm munich time) email : onlitgerman@hibbertco.com french phone : (+1) 3033087141 (mf 1:00pm to 5:00pm toulouse time) email : onlitfrench@hibbertco.com english phone : (+1) 3033087142 (mf 12:00pm to 5:00pm uk time) email : onlit@hibbertco.com european tollfree access*: 0080044223781 *available from germany, france, italy, england, ireland greenline is a trademark of motorola, inc.

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